Job Details:Job Description: Develops custom layout design of complex digital, custom blocks, standard cell libraries, or memory compilers (e.g., bit cells, SRAMs, Register Files). Performs detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf, cell layout, and compiler assembly coding. Conducts complete layout verification including design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks. Uses custom autorouters and custom placers to efficiently construct layout. Provides feedback to circuit
Design Engineers for new feature feasibility studies and implements circuit enhancement requests. Develops and drives new and innovative layout methods to improve productivity and quality. Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology issues used for layout design.
Qualifications:MS/ME/MTech in VLSI or BS/BE/BTech in Electronics Engineering with a minimum of three years of industry experience in designing and optimizing VLSI layout at the cell and or block level on different silicon process technologies is required. Additional Desired Qualifications Knowledge of CAD layout tools eg Cadence Virtuoso Synopsys Custom Compiler any other industry-standard layout development tool Experience using design rule checkers and layout verification tools Knowledge of additional layout automation capabilities eg process shift Knowledge of scripting languages TCL Perl Skill Python for design automation is a plusJob Type:Experienced HireShift:Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.