Senior Engineer, Tapeout

The successful candidate will have the foundation to develop technical semiconductor knowledge. This role is essential for enabling high quality devices while minimizing time to market of Micron products supporting Technology Development and Manufacturing.

Interested candidates should be comfortable working a non-standard work week (for example, Friday through Tuesday) to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities

Responsibilities include, but are not limited to the following:

• Develop Design Rule Checks through automated verification processes

• Innovate new approaches for design layout and data process verifications

• Understand design layout and processes of mask development

• Ensure visibility and communication to groups responsible for the mask development processes

• Document and report issues to related groups

• Drive problems to resolution; identify and manage risks

• Facilitate effectiv

The successful candidate will have the foundation to develop technical semiconductor knowledge. This role is essential for enabling high quality devices while minimizing time to market of Micron products supporting Technology Development and Manufacturing.

Interested candidates should be comfortable working a non-standard work week (for example, Friday through Tuesday) to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities

Responsibilities include, but are not limited to the following:

• Develop Design Rule Checks through automated verification processes

• Innovate new approaches for design layout and data process verifications

• Understand design layout and processes of mask development

• Ensure visibility and communication to groups responsible for the mask development processes

• Document and report issues to related groups

• Drive problems to resolution; identify and manage risks

• Facilitate effective meetings with key stakeholders

Successful candidates for this position will have:

• Skills in CAD layout

• Proficient in coding utilizing Python, Perl, or PerlTK

• Familiarity with Cadence SKILL

• Proven track record working with people

• Strong troubleshooting and problem-solving skills

• The ability to multi-task with strong project organizational skills

• Layout viewer (i.e. K2View) experience; DF2 database layout experience is ideal

• Basic understanding of semiconductor manufacturing technologies (basic CMOS understanding is desirable)

• Basic understanding of lithography and photo masks

• Experience working with off-shore teams (US and Japan desirable)

• Strong verbal and written ability in English

Education:

• Bachelor's or Master's in EE or related science discipline

Experience:

· Minimum two years experience in the semiconductor industry