Asic Digital Design, Sr Staff Engineer

The requirement for high speed data transfer is the need of the hour, as the fabrication and Datapath convergence is closely controlled by sub-micron limitations; There is always scope for improvements and enhancements that are required for successful data transfer with the required baud rate.
High-speed-serial-links play a vital role in achieving this, whether it’s a inter or intra chip communication or even a peripheral connection. We at Solutions Group (SG) Synopsys India Pvt. Ltd. Constantly strive to push our consumer and enterprise products to meet the protocol and industry requirements.
As a part of this eco-system, we have a team who is expertized in design, verification, validation and packaging. We are looking for individuals, who are passionate and have strong fundamental across the board of functional-design-verification.
If this objective interests you, they need to fulfill the following requirements.

• Should be a graduate or post graduate, in their practice school or internship phases.
• We prefer candidates from Electrical Electronics Engineering, Electronics and Telecommunication Engineering branches or any VLSI and Microelectronics related.
• The candidate should have strong digital and analog fundamentals. Should be capable of designing finite state machines for complex arithmetic and logic operations.
• The candidate should have the ability to translate algorithmic-flowcharts to pseudo code.
• Exposure on functional verification is an added advantage, it will be even beneficial if they have methodological understanding viz. UVM, OVM, VMM.
• Knowledge on HDL’s preferably Verilog and system Verilog is a must.
• Fundamentals of protocols (PCIe, IEEE802.3) at theoretical level is a very good to have skill.
• Good Aptitude and problem solvability is a must.
• We want a candidates who have the attitude for continual-improvement and enthusiasm to learn.